SH7018 Datasheet, PDF (133/431 Pages) Renesas Technology Corp – SuperH™ RISC engine

• Bit 3—Output Compare Flag D (TGFD): This status flag indicates the occurrence of a channel
0 TGRD register compare-match.
This bit is reserved in channels 1 and 2. It is always read as 0. The write value should always
be 0.
Bit 3: TGFD
0
1
Description
Clear condition: With TGFD = 1, a 0 write to TGFD following a read
(Initial value)
Set condition: When TCNT = TGRD while TGRD is functioning as an
output compare register
• Bit 2—Input Capture/Output Compare Flag C (TGFC): This status flag indicates the
occurrence of a Channel 0 TGRC register input capture or compare-match.
This bit is reserved for channels 1 and 2. It is always read as 0. The write value should always
be 0.
Bit 2: TGFC
0
1
Description
Clear condition: With TGFC = 1, a 0 write to TGFC following a read
(Initial value)
Set conditions:
• When TGRC is functioning as an output compare register
(TCNT = TGRC)
• When TGRC is functioning as input capture (the TCNT value is sent
to TGRC by the input capture signal)
• Bit 1—Output Compare Flag B (TGFB): This status flag indicates the occurrence of a TGRB
register compare-match.
Bit 1: TGFB
0
1
Description
Clear condition: With TGFB = 1, a 0 write to TGFB following a read
(Initial value)
Set conditions: When TGRB is functioning as an output compare
register (TCNT = TGRB)
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