SH7018 Datasheet, PDF (327/431 Pages) Renesas Technology Corp – SuperH™ RISC engine

15.6.2 Port E Data Register (PEDR)
The port E data register (PEDR) is a 16-bit readable/writable register that stores port E data. The
bits of this register correspond to the various pins. When a pin functions as a general output, if a
value is written to PEDR, that value is output directly from the pin, and if PEDR is read, the
register value is returned directly regardless of the pin state.
When a pin functions as a general input, if PEDR is read the pin state, not the register value, is
returned directly. If a value is written to PEDR, that value is written to PEDR but it does not affect
the pin state. Table 15.10 summarizes the port E data register read/write operations.
PEDR is initialized by an external power-on reset. However, it is not initialized by a WDT reset,
in standby mode, or in sleep mode.
Bit: 15
14
13
12
11
10
9
8
— PE14DR PE13DR PE12DR PE11DR PE10DR PE9DR PE8DR
Initial value:
0
0
0
0
0
0
0
0
R/W: R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
7
6
5
4
3
2
1
0
PE7DR PE6DR PE5DR PE4DR
—
PE2DR
— PE0DR
Initial value:
0
0
0
0
0
0
0
0
R/W: R/W
R/W
R/W
R/W
R
R/W
R
R/W
Table 15.10 Port E Data Register (PEDR) Read/Write Operations
PEIOR Pin Function
0
General input
Other than general
input
1
General output
Other than general
output
Read
Pin state
Pin state
PEDR value
PEDR value
Write
Value is written to PEDR, but does not affect pin
state
Value is written to PEDR, but does not affect pin
state
Write value is output from pin
Value is written to PEDR, but does not affect pin
state
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