SH7018 Datasheet, PDF (202/431 Pages) Renesas Technology Corp – SuperH™ RISC engine

10.5 Notes on Use
Take care that the contentions described in sections 10.5.1 to 10.5.3 do not arise during CMT
operation.
10.5.1 Contention between CMCNT Write and Compare Match
If a compare match signal is generated during the T₂ state of the CMCNT counter write cycle, the
CMCNT counter clear has priority, so the write to the CMCNT counter is not performed. Figure
10.6 shows the timing.
CMCNT write cycle
T₁
T₂
CK
Address
CMCNT
Internal
write signal
Compare
match signal
CMCNT
N
H'0000
Figure 10.6 CMCNT Write and Compare Match Contention
186