SH7018 Datasheet, PDF (138/431 Pages) Renesas Technology Corp – SuperH™ RISC engine

Internal data bus
Upper 8 bits
Module data bus
Bus master
Lower 8 bits
Bus
interface
TCR
Figure 8.3 8-Bit Register Access Operation (Bus Master ↔ TCR (Upper 8 Bits))
Internal data bus
Upper 8 bits
Module data bus
Bus master
Bus
interface
Lower 8 bits
TMDR
Figure 8.4 8-Bit Register Access Operation (Bus Master ↔ TMDR (Lower 8 Bits))
Internal data bus
Upper 8 bits
Module data bus
Bus master
Bus
interface
Lower 8 bits
TCR
TMDR
Figure 8.5 8-Bit Register Access Operation (Bus Master ↔ TCR, TMDR (16 Bits))
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