SH7108 Datasheet, PDF (546/560 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A Pin States
Pin Function
Pin State
Type
Pin Name
Extended
without
ROM
MMT
PCIO
Z
PUOA, PUOB Z
PVOA, PVOB
PWOA, PWOB
Port control POE0 to POE6 Z
Reset State
Power-On
Extended Single-
with ROM Chip
Manual
I/O
O
I
Power-Down Mode
Hardware
Standby
Z
Z
Software
Standby
K*¹
Z*²
Sleep
I/O
O
Z
Z
I
Bus
Release
State
I/O
O
Software
Standby in
Bus
Release
State
K*¹
Z*²
I
Z
SCI
SCK2, SCK3 Z
I/O
Z
Z
I/O
I/O
Z
RxD2, RxD3 Z
TxD2, TxD3 Z
I
Z
Z
I
I
Z
O
Z
O*¹
O
O
O*¹
A/D
AN0 to AN19 Z
converter _ADTRG
Z
I/O ports PA0 to PA15 Z
I
Z
I
Z
I/O
Z
Z
I
I
Z
Z
I
I
Z
K*¹
I/O
I/O
K*¹
PB0 to PB5
PD0 to PD8
PE0 to PE8,
PE10
PE9,
Z
PE11 to PE21
I/O
Z
Z*²
I/O
I/O
Z*²
PF0 to PF15 Z
I
Z
Z
I
I
Z
PG0 to PG3
Legend:
I: Input
O: Output
H: High-level output
L: Low-level output
Z: High impedance
K: Input pins become high-impedance, and output pins retain their state.
Notes: 1. When the HIZ bit in SBYCR is set to 1, the output pins enter the high-impedance state.
2. Those pins multiplexed with large-current pins (PE9 and PE11 to PE15) unconditionally
enter the high-impedance state.
3. This pin operates as an input pin during a power-on reset. This pin should be pulled up
to avoid malfunction.
4. This pin operates as an input pin when the IRQEL bit in SBYCR is cleared to 0.
Rev.1.00 Sep. 18, 2008 Page 512 of 522
REJ09B0069-0100