SH7108 Datasheet, PDF (218/560 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 8 Multifunction Timer Pulse Unit (MTU)
Reset-Synchronized PWM Mode Operation: Figure 8.31 shows an example of operation in the
reset-synchronized PWM mode. TCNT_3 and TCNT_4 operate as upcounters. The counter is
cleared when a TCNT_3 and TGRA_3 compare-match occurs, and then begins counting up from
H'0000. The PWM output pin output toggles with each occurrence of a TGRB_3, TGRA_4,
TGRB_4 compare-match, and upon counter clears.
TCNT3 and TCNT4
values
TGRA_3
TGRB_3
TGRA_4
TGRB_4
H'0000
Time
TIOC3B
TIOC3D
TIOC4A
TIOC4C
TIOC4B
TIOC4D
Figure 8.31 Reset-Synchronized PWM Mode Operation Example
(When the TOCR’s OLSN = 1 and OLSP = 1)
8.4.8 Complementary PWM Mode
In the complementary PWM mode, three-phase output of non-overlapping positive and negative
PWM waveforms can be obtained by combining channels 3 and 4.
In complementary PWM mode, TIOC3B, TIOC3D, TIOC4A, TIOC4B, TIOC4C, and TIOC4D
pins function as PWM output pins, the TIOC3A pin can be set for toggle output synchronized with
the PWM period. TCNT_3 and TCNT_4 function as increment/decrement counters.
Table 8.39 shows the PWM output pins used. Table 8.40 shows the settings of the registers used.
A function to directly cut off the PWM output by using an external signal is supported as a port
function.
Rev.1.00 Sep. 18, 2008 Page 184 of 522
REJ09B0069-0100