SH7108 Datasheet, PDF (16/560 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11.7.1 Module Standby Mode Setting ............................................................................ 347
11.7.2 Permissible Signal Source Impedance ................................................................. 347
11.7.3 Influences on Absolute Accuracy ........................................................................ 347
11.7.4 Range of Analog Power Supply and Other Pin Settings ...................................... 348
11.7.5 Notes on Board Design ........................................................................................ 348
11.7.6 Notes on Noise Countermeasures ........................................................................ 348
Section 12 Compare Match Timer (CMT) ........................................................351
12.1 Features............................................................................................................................. 351
12.2 Register Descriptions ........................................................................................................ 352
12.2.1 Compare Match Timer Start Register (CMSTR) ................................................. 352
12.2.2 Compare Match Timer Control/Status Registers_0 and 1
(CMCSR_0, CMCSR_1) ..................................................................................... 353
12.2.3 Compare Match Timer Counters_0 and 1 (CMCNT_0, CMCNT_1) .................. 354
12.2.4 Compare Match Timer Constant Registers_0 and 1
(CMCOR_0, CMCOR_1) .................................................................................... 354
12.3 Operation .......................................................................................................................... 354
12.3.1 Cyclic Count Operation ....................................................................................... 354
12.3.2 CMCNT Count Timing........................................................................................ 355
12.4 Interrupts........................................................................................................................... 355
12.4.1 Interrupt Sources.................................................................................................. 355
12.4.2 Compare Match Flag Set Timing......................................................................... 355
12.4.3 Compare Match Flag Clear Timing ..................................................................... 356
12.5 Usage Notes ...................................................................................................................... 357
12.5.1 Contention between CMCNT Write and Compare Match................................... 357
12.5.2 Contention between CMCNT Word Write and Incrementation .......................... 358
12.5.3 Contention between CMCNT Byte Write and Incrementation ............................ 359
Section 13 Motor Management Timer (MMT) .................................................361
13.1 Features............................................................................................................................. 361
13.2 Input/Output Pins .............................................................................................................. 363
13.3 Register Descriptions ........................................................................................................ 363
13.3.1 Timer Mode Register (MMT_TMDR) ................................................................ 365
13.3.2 Timer Control Register (TCNR) .......................................................................... 366
13.3.3 Timer Status Register (MMT_TSR) .................................................................... 367
13.3.4 Timer Counter (MMT_TCNT) ............................................................................ 368
13.3.5 Timer Buffer Registers (TBR) ............................................................................. 368
13.3.6 Timer General Registers (TGR)........................................................................... 368
13.3.7 Timer Dead Time Counter (TDCNT) .................................................................. 368
13.3.8 Timer Dead Time Data Register (MMT_TDDR) ................................................ 368
Rev.1.00 Sep. 18, 2008 Page xvi of xxxiv
REJ09B0069-0100