SH7108 Datasheet, PDF (130/560 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 7 Bus State Controller (BSC)
7.4 Address Map
Figure 7.2 shows the address format used by this LSI.
A31 to A24
A23, A22
A21 to A18
A17
A0
Output address:
Output from the address pins
CS space selection:
Decoded, outputs when A31 to A24 = 00000000
Space selection:
Not output externally; used to select the type of space
On-chip ROM space or CS0 space when 00000000 (H'00)
Reserved (do not access) when 00000001 to 11111110 (H'01 to H'FE)
On-chip peripheral module space or on-chip RAM space when 11111111 (H'FF)
Figure 7.2 Address Format
This chip uses 32-bit addresses:
• Bits A31 to A24 are used to select the type of space and are not output externally.
• Bits A23 and A22 are decoded and output as chip select signals (CS0) for the corresponding
areas when bits A31 to A24 are 00000000.
• A17 to A0 are output externally. A21 to A18 are not output externally.
Table 7.2 shows the address map.
Rev.1.00 Sep. 18, 2008 Page 96 of 522
REJ09B0069-0100