SH7108 Datasheet, PDF (455/560 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 14 Pin Function Controller (PFC)
Register Bit
Initial
Bit Name Value R/W
Description
PDCRL2 1
PDCRL1 1
PD1MD1 0
PD1MD0 0*¹
R/W PD1 Mode
R/W Select the function of the PD1/D1/TxD2 pin.
00: PD1 I/O (port)
10: TxD2 output (SCI)
01: D1 I/O (BSC)*² 11: Setting prohibited
PDCRL2 0
PD0MD1 0
R/W PD0 Mode
PDCRL1 0
PD0MD0 0*¹
R/W Select the function of the PD0/D0/RxD2 pin.
00: PD0 I/O (port)
10: RxD2 input (SCI)
01: D0 I/O (BSC)*² 11: Setting prohibited
Notes: 1. The initial value is 1 in 8-bit external extended mode with the on-chip ROM disabled.
2. When using the external buses, set D7 to D0 at input/output pins.
14.1.7 Port E I/O Registers L and H (PEIORL and PEIORH)
PEIORL and PEIORH are 16-bit readable/writable registers that set the pins on port E as inputs or
outputs. Bits PE21IOR to PE0IOR correspond to pins PE21 to PE0 (names of multiplexed pins are
here given as port names and pin numbers alone). PEIORL is enabled when the port E pins are
functioning as general-purpose inputs/outputs (PE15 to PE0), TIOC pins are functioning as
inputs/outputs of the MTU, and SCK2 and SCK3 pins are functioning as inputs/outputs of the SCI.
In other states, PEIORL is disabled. PEIORH is enabled when the port E pins are functioning as
general-purpose inputs/outputs (PE21 to PE16). In other states, PEIORH is disabled.
A given pin on port E will be an output pin if the corresponding PEIORL or PEIORH bit is set to 1,
and an input pin if the bit is cleared to 0.
Bits 15 to 6 in PEIORH are reserved. These bits are always read as 0. The write value should
always be 0.
The initial values of PEIORL and PEIORH are H'0000.
14.1.8 Port E Control Registers L1, L2, and H (PECRL1, PECRL2, and PECRH)
PECRL1, PECRL2, and PECRH are 16-bit readable/writable registers that select the multiplexed
pin function of the pins on port E.
Rev.1.00 Sep. 18, 2008 Page 421 of 522
REJ09B0069-0100