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SH7108 Datasheet, PDF (536/560 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer
Section 20 Electrical Characteristics
CK
tTCKS
tTCKS
TCLKA to
TCLKD
tTCKWL
tTCKWH
Figure 20.14 MTU Clock Input Timing
20.3.6 I/O Port Timing
Table 20.8 shows the I/O port timing.
Table 20.8 I/O Port Timing
Conditions: VCC = 4.0 V to 5.5 V, AVCC = 4.0 V to 5.5 V, VSS = PLLVSS = AVSS = 0 V, Ta = –20°C
to +75°C (standard product*), Ta = –40°C to +85°C (wide temperature-range
product*)
Item
Symbol
Min.
Max.
Unit
Figure
Port output data delay time
t
PWD
—
100
ns
Figure 20.15
Port input hold time
tPRH
19
—
ns
Port input setup time
tPRS
[Operating precautions]
19
—
ns
The port input signals are asynchronous. They are, however, considered to have been
changed at CK clock falling edge with two-state intervals shown in figure 20.15. If the setup
times shown here are not observed, recognition may be delayed until the clock falling two
states after that timing.
Note: * For details on correspondence of the standard product, wide temperature-range product,
and product model name, refer to description of maximum operating frequency and
operating temperature range in section 1.1, Features.
CK
Port
(read)
Port
(write)
tPRS
tPRH
tPWD
Figure 20.15 I/O Port Input/Output Timing
Rev.1.00 Sep. 18, 2008 Page 502 of 522
REJ09B0069-0100