SH7108 Datasheet, PDF (518/560 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 19 List of Registers
Register
Power- Manual Hardware Software Module
Abbreviation On Reset Reset Standby Standby Standby Sleep
Module
TBRV_F
Initialized Held Initialized Initialized Initialized Held MMT
TBRW_B
TGRWU
Initialized
Initialized
Held
Held
Initialized Initialized Initialized
Initialized Initialized Initialized
Held
Held
TGRW
TGRWD
Initialized
Initialized
Held
Held
Initialized Initialized Initialized
Initialized Initialized Initialized
Held
Held
TDCNT4
Initialized Held Initialized Initialized Initialized Held
TDCNT5
Initialized Held Initialized Initialized Initialized Held
TBRW_F
Initialized Held Initialized Initialized Initialized Held
Notes: 1. Bits 7 to 5 (OVF, WT/IT, and TME) in the TCSR register are initialized. The values of
bits 2 to 0 (CKS2, CKS1, and CKS0) are retained.
2. The RSTC SR register value is retained on a power-on reset due to a watchdog timer
overflow.
Rev.1.00 Sep. 18, 2008 Page 484 of 522
REJ09B0069-0100