SH7108 Datasheet, PDF (353/560 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 10 Serial Communication Interface (SCI)
Note that clearing the RE bit to 0 does not initialize the RDRF, PER, FER, and ORER flags, or the
contents of RDR.
Start initialization
Clear RIE, TIE, TEIE, MPIE,
TE and RE bits in SCR to 0*
Set CKE1 and CKE0 bits in SCR [1]
(TE and RE bits are 0)
Set data transfer format in
[2]
SMR
Set value in BRR
[3]
Wait
No
1-bit interval elapsed?
Yes
Set PFC of the external pin used
SCK, TxD, RxD
[4]
Set SCR RIE, TIE, and TEIE bits _[5]
and set SCR TE and RE bits to 1.
[1] Set the clock selection in SCR.
[2] Set the data transfer format in SMR.
[3] Write a value corresponding to the bit
rate to BRR. Not necessary if an
external clock is used.
[4] Set PFC of the external pin used. Set
RxD input during receiving and TxD
output during transmitting. Set SCK
input/output according to contents set
by the CKE1 and CKE0 bits.
[5] Wait at least one bit interval, then set
the TE bit or RE bit in SCR to 1.* At this
time, the TxD, RxD, and SCK pins can
be used. The TxD pin is in a mark state
during transmitting. When synchronous
clock output (clock master) is set during
receiving in clocked synchronous mode,
outputting clocks from the SCK pin
starts.
<Start reception/transmission>
Note: * In simultaneous transmit and receive operations, the TE and RE bits should both be
cleared to 0 or set to 1 simultaneously.
Figure 10.15 Sample SCI Initialization Flowchart
10.6.3 Serial Data Transmission (Clocked Synchronous Mode)
Figure 10.16 shows an example of SCI operation for transmission in clocked synchronous mode.
In serial transmission, the SCI operates as described below.
1. The SCI monitors the TDRE flag in SSR, and if it is cleared to 0, recognizes that data has been
written to TDR, and transfers the data from TDR to TSR.
2. After transferring data from TDR to TSR, the SCI sets the TDRE flag to 1 and starts
transmission. If the TIE bit in SCR is set to 1 at this time, a transmit data empty (TXI)
interrupt request is generated. Because the TXI interrupt routine writes the next transmit data
Rev.1.00 Sep. 18, 2008 Page 319 of 522
REJ09B0069-0100