SH7108 Datasheet, PDF (404/560 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 13 Motor Management Timer (MMT)
13.4.1 Sample Setting Procedure
An example of the operating mode setting procedure is shown in figure 13.2.
Halt count operation
Clear the CST bit to 0 in the timer control register
(TCNR) to halt timer counter operation. Make the
operating mode setting while TCNT is halted.
Set TCNT
Set 2Td (Td: dead time) in TCNT.
Set dead time carrier period
Set TBR
Set dead time Td in the dead time data register
(TDDR), set 1/2 the carrier period in the timer period
buffer register (TPBR), and set {TPBR value + 2Td}
in the timer period data register (TPDR).
Set the output PWM duty cycle {PWM duty cycle
initial value – Td} in the free operation addresses of
the buffer registers (TBRU, TBRV, TBRW).
Set PWM output level
Set the PWM output level with bits OLSN and OLSP
in the timer mode register (TMDR).
Set operating mode
Set external pin functions
Set the operating mode in the timer mode register
(TMDR). The PUOA, PUOB, PVOA, PVOB, PWOA,
and PWOB pins are output pins.
Set the external pin functions with the pin function
controller (PFC).
Start count operation
Set the CST bit to 1 in TCNR to start the count
operation.
<Operating mode>
Figure 13.2 Sample Operating Mode Setting Procedure
Rev.1.00 Sep. 18, 2008 Page 370 of 522
REJ09B0069-0100