SH7108 Datasheet, PDF (40/560 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Rev.1.00 Sep. 18, 2008 Page 6 of 522
REJ09B0069-0100
Figure 1.4 SH7109/SH7107/SH7105 Pin Assignment
NC
Enabled
Handling procedure
Vcc fixed Vss fixed Pull-up Pull-down
Enabled Enabled Enabled Enabled
Note: * ASEBRKAK:
50 VSS
49 AVSS
48 PF0/AN0
47 PF8/AN8
46 AVCC
45 PF1/AN1
44 PF9/AN9
43 PF2/AN2
42 PF10/AN10
41 PF3/AN3
40 PF11/AN11
39 PF12/AN12
38 PF4/AN4
37 PF13/AN13
36 PF5/AN5
35 PF14/AN14
34 PF6/AN6
33 AVCC
32 PF15/AN15
31 PF7/AN7
30 AVSS
29 VSS
28 PE21/PWOB/A15
27 VCL
26 PE20/PVOB/A14
QFP-100
(Top view)
PD8 76
VCL 77
PD7/D7 78
PD6/D6 79
PD5/D5 80
PD4/D4 81
VSS 82
VCC 83
VCC 84
HSTBY 85
PD3/D3 86
RES 87
PD2/D2/SCK2 88
NMI 89
PD1/D1/TxD2 90
MD3 91
PD0/D0/RxD2 92
MD2 93
MD1 94
MD0 95
EXTAL 96
XTAL 97
PLLVCL 98
PLLCAP 99
PLLVSS 100
Section 1 Overview