SH7108 Datasheet, PDF (226/560 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 8 Multifunction Timer Pulse Unit (MTU)
with the counter. In this interval, therefore, there are two compare match registers for one-phase
output, with the compare register containing the pre-change data, and the temporary register
containing the new data. In this interval, the three counters—TCNT_3, TCNT_4, and TCNTS—
and two registers—compare register and temporary register—are compared, and PWM output
controlled accordingly.
Transfer from temporary
register to compare register
Transfer from temporary
register to compare register
Tb2
TGRA_3
TCDR
TGRA_4
TGRC_4
TDDR
H'0000
Buffer register
TGRC_4
Temporary register
TEMP2
Compare register
TGRA_4
Ta
Tb1
TCNTS
TCNT_3
TCNT_4
Ta
Tb2
Ta
H'6400
H'6400
H'6400
H'0080
H'0080
H'0080
Output waveform
waveform
(Output waveform is active-low)
Figure 8.35 Example of Complementary PWM Mode Operation
Rev.1.00 Sep. 18, 2008 Page 192 of 522
REJ09B0069-0100