SH7108 Datasheet, PDF (403/560 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 13 Motor Management Timer (MMT)
13.3.10 Timer Period Data Register (TPDR)
TPDR functions as a 16-bit compare register. In the operating modes, the TPDR value is
constantly compared with the TCNT counter value, and when they match, the TCNT counter
changes its count direction from up to down. The initial value of TPDR is H'FFFF. Only 16-bit
access can be used on TPDR; 8-bit access is not possible.
13.4 Operation
When the operating mode is selected, a three-phase PWM waveform is output with a non-overlap
relationship between the positive and negative phases.
The PUOA, PUOB, PVOA, PVOB, PWOA, and PWOB pins are PWM output pins, the PCIO pin
(when set to output) functions as a toggle output synchronized with the PWM waveform, and the
PCI0 pin (when set to input) functions as the counter clear signal input. The TCNT counter
performs up- and down-count operations, whereas the TDCNT counters perform up-count
operations.
Rev.1.00 Sep. 18, 2008 Page 369 of 522
REJ09B0069-0100