SH7108 Datasheet, PDF (484/560 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 18 Power-Down Modes
Table 18.1 Internal Operating States in Each Mode
Function
Normal
operation Sleep
Module
Standby
Software
Standby
Hardware
Standby
System clock pulse
generator
Functioning Functioning Functioning Halted
Halted
CPU
Instructions Functioning Halted
Registers
(retained)
Functioning Halted
(retained)
Halted
(undefined)
External
interrupts
NMI
IRQ3 to
IRQ0
Functioning Functioning Functioning Functioning Halted
Peripheral I/O ports
functions
Functioning Functioning Functioning Retained
High
impedance
WDT
Functioning Functioning Functioning Halted
(retained)
Halted (reset)
SCI
Functioning Functioning Halted (reset) Halted (reset) Halted (reset)
A/D
MTU
CMT
MMT
ROM
Functioning Functioning Halted (reset) Halted (reset) Halted (reset)
RAM
Functioning Functioning Retained Retained Retained
Notes: "Halted (retained)" means that the operation of the internal state is suspended, although
internal register values are retained.
"Halted (reset)" means that internal register values and internal state are initialized.
In module standby mode, only modules for which a stop setting has been made are halted
(reset or retained).
1. There are two types of on-chip peripheral module registers; ones which are initialized in
software standby mode and module standby mode, and those not initialized in those
modes. For details, refer to section 19.3, Register States in Each Operating Mode.
2. The port high-impedance bit (Hi-Z) in SBYCR sets the state of the I/O ports in software
standby mode. For details on the setting, refer to section 18.2.1, Standby Control
Register (SBYCR). For the state of pins, refer to appendix A, Pin States.
Rev.1.00 Sep. 18, 2008 Page 450 of 522
REJ09B0069-0100