SH7108 Datasheet, PDF (497/560 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 19 List of Registers
Section 19 List of Registers
The column “Access Size” shows the number of bits.
The column “Access States” shows the number of access states, in units of cycles, of the specified
reference clock. B, W, and L in the column represent 8-bit, 16-bit, and 32-bit access, respectively.
19.1 Register Addresses (Address Order)
Register Name
—
Abbre-
viation
—
Serial mode register_2
SMR_2
Bit rate register_2
BRR_2
Serial control register_2
SCR_2
Transmit data register_2
TDR_2
Serial status register_2
SSR_2
Receive data register_2
RDR_2
Serial direction control register_2 SDCR_2
—
—
Serial mode register_3
SMR_3
Bit rate register_3
BRR_3
Serial control register_3
SCR_3
Transmit data register_3
TDR_3
Serial status register_3
SSR_3
Receive data register_3
RDR_3
Serial direction control register_3 SDCR_3
—
—
—
—
Timer control register_3
Timer control register_4
Timer mode register_3
Timer mode register_4
Timer I/O control register H_3
Timer I/O control register L_3
TCR_3
TCR_4
TMDR_3
TMDR_4
TIORH_3
TIORL_3
Bits Address
Access Access
Module Size States
— H'FFFF8000 to —
H'FFFF81BF
—
—
8 H'FFFF81C0
8 H'FFFF81C1
8 H'FFFF81C2
SCI
8, 16
(channel 2) ₈
8, 16
In Pφ cycles
B: 2
W: 4
8 H'FFFF81C3
8
8 H'FFFF81C4
8, 16
8 H'FFFF81C5
8
8 H'FFFF81C6
8
— H'FFFF81C7 to —
—
H'FFFF81CF
8 H'FFFF81D0
8 H'FFFF81D1
SCI
8, 16
(channel 3) ₈
8 H'FFFF81D2
8, 16
8 H'FFFF81D3
8
8 H'FFFF81D4
8, 16
8 H'FFFF81D5
8
8 H'FFFF81D6
8
— H'FFFF81D7 to —
—
H'FFFF81EF
— H'FFFF81F0 to —
H'FFFF81FF
—
—
8 H'FFFF8200
8 H'FFFF8201
8 H'FFFF8202
MTU
8, 16, 32 In Pφ cycles
(channels 3 ₈
and 4)
8, 16
B: 2
W: 2
L: 4
8 H'FFFF8203
8
8 H'FFFF8204
8, 16, 32
8 H'FFFF8205
8
Rev.1.00 Sep. 18, 2008 Page 463 of 522
REJ09B0069-0100