SH7108 Datasheet, PDF (385/560 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 12 Compare Match Timer (CMT)
Section 12 Compare Match Timer (CMT)
This LSI has an on-chip compare match timer (CMT) comprising two 16-bit timer channels. The
CMT has 16-bit counters and can generate interrupts at set intervals.
12.1 Features
• Four types of counter input clock can be selected
One of four internal clocks (Pφ/8, Pφ/32, Pφ/128, Pφ/512) can be selected independently for
each channel.
• Interrupt sources
A compare match interrupt can be requested independently for each channel.
• Module standby mode can be set
Figure 12.1 shows a block diagram of the CMT.
CMI0
Pφ/32 Pφ/512
Pφ/8 Pφ/128
CMI1
Pφ/32 Pφ/512
Pφ/8 Pφ/128
Control circuit
Clock selection
Control circuit
Clock selection
Module bus
Legend:
CMSTR: Compare match timer start register
CMCSR: Compare match timer control/status register
CMCOR: Compare match timer constant register
CMCNT: Compare match timer counter
CMI:
Compare match interrupt
CMT
Figure 12.1 CMT Block Diagram
Bus
interface
Internal bus
TIMCMT0A_010020030200
Rev.1.00 Sep. 18, 2008 Page 351 of 522
REJ09B0069-0100