SH7108 Datasheet, PDF (23/560 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Figure 8.29 Phase Counting Mode Application Example.......................................................... 180
Figure 8.30 Procedure for Selecting the Reset-Synchronized PWM Mode............................... 183
Figure 8.31 Reset-Synchronized PWM Mode Operation Examplex
(When the TOCR’s OLSN = 1 and OLSP = 1) ...................................................... 184
Figure 8.32 Block Diagram of Channels 3 and 4 in Complementary PWM Mode ................... 187
Figure 8.33 Example of Complementary PWM Mode Setting Procedure................................. 189
Figure 8.34 Complementary PWM Mode Counter Operation................................................... 191
Figure 8.35 Example of Complementary PWM Mode Operation ............................................. 192
Figure 8.36 Example of PWM Cycle Updating......................................................................... 194
Figure 8.37 Example of Data Update in Complementary PWM Mode ..................................... 196
Figure 8.38 Example of Initial Output in Complementary PWM Mode (1).............................. 197
Figure 8.39 Example of Initial Output in Complementary PWM Mode (2).............................. 198
Figure 8.40 Example of Complementary PWM Mode Waveform Output (1) .......................... 199
Figure 8.41 Example of Complementary PWM Mode Waveform Output (2) .......................... 200
Figure 8.42 Example of Complementary PWM Mode Waveform Output (3) .......................... 200
Figure 8.43 Example of Complementary PWM Mode 0% and 100% Waveform Output (1) ... 201
Figure 8.44 Example of Complementary PWM Mode 0% and 100% Waveform Output (2) ... 201
Figure 8.45 Example of Complementary PWM Mode 0% and 100% Waveform Output (3) ... 202
Figure 8.46 Example of Complementary PWM Mode 0% and 100% Waveform Output (4) ... 202
Figure 8.47 Example of Complementary PWM Mode 0% and 100% Waveform Output (5) ... 203
Figure 8.48 Example of Toggle Output Waveform Synchronized with PWM Output.............. 204
Figure 8.49 Counter Clearing Synchronized with Another Channel ......................................... 205
Figure 8.50 Example of Output Phase Switching by External Input (1).................................... 206
Figure 8.51 Example of Output Phase Switching by External Input (2).................................... 206
Figure 8.52 Example of Output Phase Switching by Means of UF, VF, WF Bit Settings (1)... 207
Figure 8.53 Example of Output Phase Switching by Means of UF, VF, WF Bit Settings (2)... 207
Figure 8.54 Count Timing in Internal Clock Operation............................................................. 211
Figure 8.55 Count Timing in External Clock Operation ........................................................... 212
Figure 8.56 Count Timing in External Clock Operation (Phase Counting Mode)..................... 212
Figure 8.57 Output Compare Output Timing (Normal Mode/PWM Mode).............................. 213
Figure 8.58 Output Compare Output Timing (Complementary PWM Mode/
Reset Synchronous PWM Mode) ........................................................................... 213
Figure 8.59 Input Capture Input Signal Timing......................................................................... 214
Figure 8.60 Counter Clear Timing (Compare Match) ............................................................... 214
Figure 8.61 Counter Clear Timing (Input Capture) ................................................................... 215
Figure 8.62 Buffer Operation Timing (Compare Match) .......................................................... 215
Figure 8.63 Buffer Operation Timing (Input Capture) .............................................................. 215
Figure 8.64 TGI Interrupt Timing (Compare Match) ................................................................ 216
Figure 8.65 TGI Interrupt Timing (Input Capture) .................................................................... 216
Figure 8.66 TCIV Interrupt Setting Timing............................................................................... 217
Rev.1.00 Sep. 18, 2008 Page xxiii of xxxiv
REJ09B0069-0100