SDA6000 Datasheet, PDF (78/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
C16X Microcontroller
Note: It is the user's responsibility that the physical GPR address specified via CP
register plus short GPR address must always be an internal RAM location. If this
condition is not met, unexpected results may occur.
• Do not set CP below the IRAM start address, i.e. 00’FA00_H/00’F600_H/00’F200_H
(1/2/3KB)
• Do not set CP above 00’FDFE_H
• Be careful when using the upper GPRs with CP above 00’FDE0_H
The CP register can be updated via any instruction which is capable of modifying an
SFR.
Note: Due to the internal instruction pipeline, a new CP value is not yet usable for GPR
address calculations of the instruction immediately following the instruction
updating the CP register.
The Switch Context instruction (SCXT) allows the saving of the contents of the CP
register onto the stack and updating of it with a new value in just one machine cycle.
Figure 4-16 Register Bank Selection via Register CP
Several addressing modes use the CP register implicitly for address calculations. The
addressing modes mentioned below are described in the “C16x Family Instruction Set
Manual”.
Users Manual
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2000-06-15