SDA6000 Datasheet, PDF (45/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
C16X Microcontroller
Note: Writing to any byte of an SFR causes the non-addressed complementary byte to
be cleared!
The upper half of each register block is bit-addressable, so the respective control/status
bits can directly be modified or checked using bit addressing.
When accessing registers in the ESFR area using 8-bit addresses or direct bit
addressing, an Extend Register (EXTR) instruction is first required to switch the short
addressing mechanism from the standard SFR area to the Extended SFR area. This is
not required for 16-bit and indirect addresses. The GPRs R15 … R0 are duplicated, i.e.
they are accessible within both register blocks via short 2-, 4- or 8-bit addresses without
switching.
ESFR_SWITCH_EXAMPLE:
EXTR #4
MOV ODP2, #data16
BFLDL DP6, #mask, #data8
BSET DP1H.7
MOV T8REL, R1
;Switch to ESFR area for next 4 instr.
;ODP2 uses 8-bit reg addressing
;Bit addressing for bit fields
;Bit addressing for single bits
;T8REL uses 16-bit mem address,
;R1 is duplicated into the ESFR space
;(EXTR is not required for this access)
;---- ;-------------------
;The scope of the EXTR #4 instruction…
; … ends here!
MOV T8REL, R1
;T8REL uses 16-bit mem address,
;R1 is accessed via the SFR space
In order to minimize the use of the EXTR instructions the ESFR area primarily holds
registers which are required mainly for initialization and mode selection. Registers that
need to be accessed frequently are allocated, wherever possible, to the standard SFR
area.
Note: The tools are equipped to monitor accesses to the ESFR area and will
automatically insert EXTR instructions or issue a warning in case of missing or
excessive EXTR instructions.
4.4
External Memory
M2 provides an external bus interface (EBI) to access an external SDRAM, together with
an external static memory device (ROM or SRAM). To optimize the overall system
performance, access to both memory types is interlocked. Because of high performance
requirements M2 provides only one bus type (Demultiplexed 16-bit Bus). Depending on
the reset configuration (refer to Chapter 6.1) an external ROM/SRAM size from
128 KByte up to 4 MByte can be chosen. Although external addresses (represented by
pins A0 … A20) are always word addresses, byte accesses to the SDRAM are possible
by using mask signals LDQM and UDQM.
Users Manual
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2000-06-15