SDA6000 Datasheet, PDF (243/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
Peripherals
The formulas below calculate either the resulting baud rate for a given reload value, or
the required reload value for a given baud rate:
33 MHz
Baud rate_SSC0 = _{2 × (<SSCBR> + 1)}
33 MHz
<SSCBR> = (
)-1
2 × Baud rate_SSC0
<SSCBR> represents the content of the reload register, taken as an unsigned 16-bit
integer while Baud rate_SSC is equal to f_SCLK as shown in Figure 7-43.
The maximum baud rate that can be achieved when using a module clock of 33.33 MHz
is 16.6 MBaud in master mode (with <SSCBR> = 0000_H) and 8.33 MBaud in slave mode
(with <SSCBR> = 0001_H) lists some possible baud rates together with the required
reload values and the resulting bit times, assuming a module clock of 33.33 MHz.
7.4.6 Error Detection Mechanisms
The SSC0 is able to detect four different error conditions. Receive Error and Phase Error
are detected in all modes, while Transmit Error and baud rate Error only apply to slave
mode. When an error is detected, the respective error flag is set and an error interrupt
request will be generated by activating the SSCEIR line (see Figure 7-44). The error
interrupt handler may then check the error flags to determine the cause of the error
interrupt. The error flags are not reset automatically but rather must be cleared by
software after servicing. This allows some error conditions to be serviced via interrupt,
while the others may be polled by software.
Note: The error interrupt handler must clear the associated (enabled) error-flag(s) to
prevent repeated interrupt requests.
Users Manual
7 - 92
2000-06-15