SDA6000 Datasheet, PDF (66/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
C16X Microcontroller
realization through special programming (see “Particular Pipeline Effects” on
page 4-29).
Protected bits are not changed during the read-modify-write sequence, i.e. when
hardware sets e.g. an interrupt request flag between the read and the write of the read-
modify-write sequence. The hardware protection logic guarantees that only the intended
bit(s) is/are effected by the write-back operation.
Note: If a conflict occurs between a bit manipulation generated by hardware and an
intended software access the software access has priority and determines the
final value of the respective bit.
4.6.3 Instruction State Times
Basically, the time needed to execute an instruction depends on where the instruction is
fetched from, and where possible operands are read from or written to. The fastest
processing mode of M2 is the execution of a program fetched from the program memory.
In this case most of the instructions can be processed within just one machine cycle,
which is also the general minimum execution time.
This section summarizes the execution times in a very condensed way. A detailed
description of the execution times for the various instructions and the specific exceptions
can be found in the “C16x Family Instruction Set Manual”.
The table below shows the minimum execution times required to process an M2
instruction fetched from the program memory, the internal RAM or from external / XBUS
memory. These execution times apply to most of the M2 instructions - except some of
the branches, the multiplication, the division and a special move instruction. In case of
program execution from the program memory there is no execution time dependency on
the instruction length except for some special branch situations. The numbers in the
table are in units of CPU clock cycles and assume no wait-states.
Table 4-2 Minimum Execution Times
Instruction Fetch
Memory Area
Word
Instruction
Doubleword
Instruction
Internal code memory 2
2
Internal RAM
6
8
16-bit Demux Bus
2
4
16-bit Mux Bus
3
6
Word Operand Access
Read from Write to
2
–
0/1
0
2
2
3
3
Execution from the internal RAM provides flexibility in terms of loadable and modifiable
code on the account of execution time.
Users Manual
4 - 33
2000-06-15