SDA6000 Datasheet, PDF (335/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

• The H/V synchronization for WSS only slicer (Sync 2)
• The acquisition interface
SDA 6000
Slicer and Acquisition
Slicer 2
(WSS only Slicer)
CVBS2
Data
Separation
D-PLL
Sync 2
H/V
Sync
Sep.
+
Timing
H-PLL
HS2_IR
VS2_IR
Slicer 1
(Full Service Slicer)
Data
Separation
CVBS1
Noise
Attenua.
Group-D.
Compen.
D-PLL
Sync 1
H/V
Sync
Sep.
+
Timing
H-PLL
HS1_IR
VS1_IR
L23_IR
CC_IR
Acquisition Interface
FC-Check
&
S/P
Converter
Address
Generation
To/from
Memory
Noise
Attenua.
Group-D.
Measur.
Parameter
Buffer
UEB11191
Figure 12-1 Block Diagram of Digital Slicer and Acquisition Interface
Users Manual
12 - 4
2000-06-15