SDA6000 Datasheet, PDF (264/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
I²C Address Register ICADR
Peripherals
Reset Value: 0000_H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
BRP
ICA ICA
ICA
MO PREDIV 0 0 0 9/ 8
ICA7..1
0/
D
0 IGE
0
Field
ICA0
–
ICA7 … 1
IGE
ICA8
ICA9..0
PREDIV
BRPMOD
Bits
0
0
7..1
8
8
9..0
[14:13]
15
Type
rw
0
rw
rw
rw
rw
rw
rw
Value Description
–
Node Address Bit 0 in 10-Bit Mode
(See ICCON bit M10)
Access is only possible in 10-bit mode.
0
Reserved read/write 0 if in 7-bit mode.
–
Node Address in 7-Bit Mode (ICA9 and
ICA0 disregarded, ICA8 becomes IGE-bit).
Ignore IRQE
In 7-bit mode, this bit becomes IGE-bit:
Ignore IRQE (End of transmission)
0
interrupt.
1
The I²C is stopped at IRQE interrupt.
The I²C ignores the IRQE interrupt.
Access is only possible in 7-bit mode.
–
Node Address Bit 8 in 10-Bit Mode
Access is only possible in 10-bit mode.
–
Node Address in 10-Bit Mode (all bits
used).
Note: Access is only possible in 10-bit
mode.
Pre Divider for Baud Rate Generation
00 pre divider is disabled
01 pre divider factor 8 is enabled
10 pre divider factor 64 is enabled
11 reserved, do not use
Baud Rate Prescaler Mode
0
Mode 0 is enabled (by default)
1
Mode 1 is enabled.
Baud Rate Selection
In order to give the user high flexibility in selection of CPU frequency and baud rate,
without constraints to baud rate accuracy, a flexible baud rate generator has been
Users Manual
7 - 113
2000-06-15