SDA6000 Datasheet, PDF (116/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
Interrupt and Trap Functions
will enter the stack overflow trap routine. Which IP value will be pushed onto the system
stack depends on which operation caused the decrement of the SP. When an implicit
decrement of the SP is made through a PUSH or CALL instruction, or upon interrupt or
trap entry, the IP value pushed is the address of the following instruction. When the SP
is decremented by a subtract instruction, the IP value pushed represents the instruction
address following the post subtract-instruction command.
To recover from stack overflow it must be ensured that there is enough excess space on
the stack to save the current system state twice (PSW, IP, in segmented mode also
CSP). Otherwise, a system reset should be generated.
Stack Underflow Trap
Whenever the stack pointer is incremented to a value which is greater than the value in
the stack underflow register STKUN, the STKUF flag is set in the TFR register and the
CPU will enter the stack underflow trap routine. Again, which IP value will be pushed
onto the system stack depends on which operation caused the increment of the SP.
When an implicit increment of the SP is made through a POP or return instruction, the
IP value pushed is the address of the following instruction. When the SP is incremented
by an add instruction, the pushed IP value represents the instruction address following
the post add-instruction command.
Undefined Opcode Trap
When the instruction currently decoded by the CPU does not contain a valid M2 opcode,
the UNDOPC flag is set in register TFR and the CPU enters the undefined opcode trap
routine. The IP value pushed onto the system stack is the address of the instruction that
caused the trap.
This can be used to emulate unimplemented instructions. The trap service routine can
examine the faulting instruction to decode operands for unimplemented opcodes based
on the stacked IP. In order to resume processing, the stacked IP value must be
incremented by the size of the undefined instruction, which is determined by the user,
before a RETI instruction is executed.
Protection Fault Trap
Whenever one of the special protected instructions is executed where the opcode of that
instruction is not repeated twice in the second word of the instruction, and the byte
following the opcode is not the complement of the opcode, the PRTFLT flag in register
TFR is set and the CPU enters the protection fault trap routine. The protected
instructions include DISWDT, EINIT, IDLE, PWRDN, SRST, and SRVWDT. The IP value
pushed onto the system stack for the protection fault trap is the address of the instruction
that caused the trap.
Users Manual
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2000-06-15