SDA6000 Datasheet, PDF (216/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

Note: Some other two-byte combinations will also be defined.
SDA 6000
Peripherals
7 Bit, Even Parity
’a’ = 61_H
1000 0 1 111
Start
Parity Stop
00
Start
’t’ = 74 _H
10 1110 1
Parity Stop
7 Bit, Odd Parity
’a’ = 61_H
10000 110 1
Start
Parity Stop
00
Start
’t’ = 74 _H
10 1111 1
Parity Stop
8 Bit, No Parity
’a’ = 61_H
10 0 0 0 1 10 1
Start
Stop
’t’ = 74 _H
00 10 1110 1
Start
Stop
8 Bit, Even Parity
’a’ = 61_H
100 0 0 1 10 1 1
Start
Parity Stop
’t’ = 74 _H
00 10 11100 1
Start
Parity Stop
8 Bit, Odd Parity
’a’ = 61_H
10 000 1 10 0 1
Start
Parity Stop
’t’ = 74 _H
00 10 1110 11
Start
Parity Stop
UED11154
Figure 7-35 Two-Byte Serial Frames with ASCII ‘at’
Users Manual
7 - 65
2000-06-15