SDA6000 Datasheet, PDF (314/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
Display Generator
The register PXDEL controls an individual delay of 0 … 2 clock cycles of the SRU
outputs. Each output (R, G, B, Italic, blank, cor) is contolled by 2 bits in the PXDEL
register.
PXDEL
Reset Value: 0000_H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
res res res res
Tcor
Tblank
Titalic
Tblu
Tgreen
Tred
Bits
1…0
3…2
5…4
7…6
9…8
11 … 10
15 … 12
delay for red
delay for green
delay for blue
delay for italic
delay for blank
delay for cor
reserved
Bits set to
“00” - no delay
“01” - delay of 1 pixel clock cycle
“10” - delay of 2 pixel clock cycles
“11” - reserved
The reset value of PXDEL is set to 0000_H, which means no dely of the SRU outputs after
reset.
Users Manual
10 - 29
2000-06-15