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SDA6000 Datasheet, PDF (352/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller
Bit
CLKDIV
NORM
SDA 6000
Slicer and Acquisition
Function
The slicing level filter needs to find the DC value of the CVBS during CRI.
In order to do this it should suppress at least the CRI frequency. As
different services use different data frequencies the CRI frequency will
be different as well. Therefore the filter characteristic needs to be shifted.
This can be done by using different clocks for the filter. The filter itself
shows sufficient suppression for frequencies between 0.0757 × SLCLK
and 0.13 × SLCLK (SLCLK is the actual filter clock and corresponds to
slicer 1)
CLKDIV
000
001
010
011
100
101
110
111
SLCLK
1 × fs
1/2 × fs
1/3 × fs
1/4 × fs
1/5 × fs
1/6 × fs
1/7 × fs
1/8 × fs
Note: fs = 33.33 MHz
Most timing signals are closely related to the actual data service used.
Therefore 3 bits specify the service received in the actual line.
NORM
000
001
010
011
100
101
110
111
Service
TXT
NABTS
VPS
WSS
CC
G+
reserved
no data service
Users Manual
12 - 21
2000-06-15