SDA6000 Datasheet, PDF (315/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
Display Generator
10.7
Description of Graphic Accelerator Instructions
GAIs are 32-bit instructions which are used as an interface from µC to DG. They are
written sequentially to the SDRAM by the controller in form of an instruction list.
Figure 10-21 shows the organization of GAIs in the memory.
Byte Address n+3+k x 4
Byte Address n+2+k x 4
Byte Address n+1+k x 4
Byte Address n+k x 4
Byte Address n+7
Byte Address n+6
Byte Address n+5
Byte Address n+4
Byte Address n+3
Byte Address n+2
Byte Address n+1
Byte Address n
Standard Format for GAIs:
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
GAI_BYTE 1
GAI_BYTE 0
GAI_BYTE 3
GAI_BYTE 2
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
UED11190
Figure 10-21 Organization of GAIs in the External SDRAM
Users Manual
10 - 30
2000-06-15