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| SDA6000 Datasheet, PDF (44/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller | |||
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SDA 6000
C16X Microcontroller
00âFCFE H
00âFCFC H
00âFCE2 H
00âFCE0 H
DSTP7
SRCP7
PEC
Source
and
Destination
Pointers
DSTP0
SRCP0
Internal
RAM
00âFD00 H
00âFCFE H
00âFCE0 H
00âFDDE H
00âF600 H
00âF5FE H
MCD02266
Figure 4-4 Location of the PEC Pointers
Whenever a PEC data transfer is performed, the pair of source and destination pointers,
which is selected by the specified PEC channel number, is accessed independent of the
current DPP register contents; the locations referred to by these pointers are also
accessed independent of the current DPP register contents. If a PEC channel is not
used, the corresponding pointer locations are available and can be used for word or byte
data storage.
4.3.4 Special Function Registers
The so-called Special Function Registers (SFRs) are provided to control internal
functions of M2 (CPU, bus interface, Interrupt Controller, OCDS) or peripherals
connected to the Peripheral Bus. These SFRs are arranged within two areas of
512 Bytes each. The first register block, the SFR area, is located in the 512 Bytes above
the internal RAM (00âFFFFH ⦠00âFE00H); the second register block, the Extended SFR
(ESFR) area, is located in the 512 Bytes below the IRAM (00âF1FFH ⦠00âF000H).
Special function registers can be addressed via indirect and long 16-bit addressing
modes. Using an 8-bit offset together with an implicit base address allows word SFRs
and their respective low bytes to be addressed. However, this does not work for the
respective high bytes!
Users Manual
4 - 11
2000-06-15
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