SDA6000 Datasheet, PDF (210/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
Peripherals
Receive/Transmit Timing
Shift Latch Shift Latch Shift
Shift Clock
Transmit Data ^{Data Bit n}
Data Bit n+1 Data Bit n+2
Receive Data ^{Valid Data n Valid Data n+1 Valid Data n+2}
Continuous Transmit Timing
Shift Clock
Transmit Data
Receive Data
D0 D1 D2 D3 D4 D5 D6 D7
1. Byte
D0 D1 D2 D3 D4 D5 D6 D7
1. Byte
D0 D1 D2 D3
2. Byte
D0 D1 D2 D3
2. Byte
UET11150
Figure 7-31 ASC0 Synchronous Mode Waveforms
7.3.3 Baud Rate Generation
The serial channel ASC0 has its own dedicated 13-bit baud rate generator with 13-bit
reload capability, allowing baud rate generation to be independent of the GPT timers.
The baud rate generator is clocked with the CPU clock. The baud rate timer is counting
downwards and can be started or stopped through the baud rate generator run bit S0R
in register S0CON. Each underflow of the timer provides one clock pulse to the serial
channel. The timer is reloaded with the value stored in its 13-bit reload register each time
it underflows. The resulting clock f_BRT is again divided according to the operating mode
and controlled by the baud rate selection bit S0BRS. If S0BRS = ‘1’, the clock signal is
additionally divided to 2/3rd of its frequency (see formulas and table). So the baud rate
of ASC0 is determined by the CPU clock, the reload value, the value of S0BRS and the
operating mode (asynchronous or synchronous).
Users Manual
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2000-06-15