SDA6000 Datasheet, PDF (301/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
Display Generator
Slow Rate Flash. Normal Flash
Fast Rate Flash. Phase 1. Normal Flash
Fast Rate Flash. Phase 2. Normal Flash
Fast Rate Flash. Phase 3. Normal Flash
UED11182
Figure 10-13 Internally Generated Flash Signals in Different Flash Phases
5-bit colour look up vectors are converted into a 12-bit RGB value and a 2-bit
transparency level by CLUT2 during display. To do this, the input side of CLUT2 the 5-
bit look up value is used for Bit0 to Bit4, the C²-values are used as Bit7 to Bit5. The 12-
bit RGB value is fed to the D/A converter and the 2-bit transparency information to the
BLANK/COR pins.
16-bit format pixels which are stored in the 12-bit RGB format are not passing the
CLUT2. The 12-bit RGB value and the 2-bit transparency information is directly fed into
the D/A converter and the BLANK/COR pins.
Frame Buffer in 16-bit Pixel Format (5:6:5)
In this mode the frame buffer contains RGB values with 5 bits for red colour components,
6 bits for green colour components and 5 bits for blue colour components:
4321054321043210
Red
Green
Green
Blue
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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Figure 10-14 16-bit Pixel Format (5:6:5) for Use in Frame Buffer
Transparency between layers is not supported if this mode is in use. The 5:6:5 format is
directly transferred to the D/A converter. CLUT2 is out of use in this mode.
Users Manual
10 - 16
2000-06-15