SDA6000 Datasheet, PDF (289/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
Display Generator
To adapt M2 to a wide range of displays in the market the sync-processing can be
flexibly configured.
Vertical Blacklevel Clamping
Screen Background Area
Layer 2
Area
Variable
Height
Layer 1
Area
Non-Visible Part
of Layer 2
Variable Width
UED11170
Figure 10-1 Display Regions and Alignments
There are three registers in the synchronization unit which are necessary for OSD setup:
• SDH: used to setup the horizontal position of the top left pixel of layer 1.
• SDV: used to setup the vertical position of the top left pixel of layer 1.
• PFR: used to setup the pixel frequency.
For detailed description of these registers please refer to chapter ‘Display Sync System’
and ‘Clock System’.
In the area which is defined for layer 1 or layer 2 (layer area) each pixel is defined by the
attribute definition of the frame buffer. There is no pixel by pixel definition for the
blacklevel clamping area and the screen background area. For these areas the colour
and transparency is defined as follows:
Transparency level and colour of the screen background area is defined globally for the
whole screen by GA instruction SAR.
During the blacklevel clamping area, black value (RGB = ‘000’) is delivered at RGB
output. Pin ‘Blank’ is set to ‘1’ and COR-pin is set to ‘0’ (normal polarity is assumed).
Users Manual
10 - 4
2000-06-15