SDA6000 Datasheet, PDF (49/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
C16X Microcontroller
MEMCLK
Pre
RAS
Read
CAS
Act
Read
SDRAM: 16 MBit, 2 Banks
A (9:0)
ra
ca
Act
Pre
Act
Read
Read
ca ra
ca
ra
A10
ra
Bank 1
A11
b1
b1
b1
SDRAM: 64 MBit, 4 Banks
A (9:0)
ra
ca
ra
ra
Bank 0
b1 b0
b0 b1
b1
ca ra
ca
ra
A10
ra
ra
ra
A11
ra
Bank Y
A(13:12)
by
by
by
Precharge Activate
dx
D(15:0) 6 7 8 1 2 3 4
ra
ra
Bank X
by _bx
Activate
bx ^by
by
Precharge Activate
dy
dy
12345678
dx
1 zo
UET11120
Figure 4-7 Interlocked Access Cycles to two SDRAM Banks
4.5.1 Memory Mapping
Mapping of memory locations from the address space of the C16x to physical addresses
(and chip selects) occurs in 4 steps (all addresses shown below are byte addresses
unless otherwise noted). Figure 4-8 gives a coarse depiction (without redirection) of the
mapping process in normal operation mode.
Users Manual
4 - 16
2000-06-15