SDA6000 Datasheet, PDF (269/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
Peripherals
bit field CO must be read in case the buffer size (defined in CI) is greater than one byte,
to decide which bytes in the receive buffer were received in the last transmission cycle.
7.6
Analog Digital Converter
M2 includes a four channel 8-bit ADC for control purposes. By means of these four input
signals the controller is able to supervise the status of several analog signals and to take
action if necessary. As these analog signals are fairly slow (compared to the video input),
one SAR-Converter is used. The input is multiplexed to four different analog inputs.
The ADC is running continuously. The four channels are scanned one after another. The
conversion results (one byte per channel), for the four channels, are stored in registers
ADDAT1 and ADDAT2. After completion of the conversion for the last channel, two
interrupt request flags ADC1IR and ADC2IR are generated.
The Peripheral Event Controller (PEC) may be used to automatically store the
conversion results into a table in the memory for later evaluation, without requiring the
overhead of entering and exiting interrupt routines for each data transfer.
The S&H circuit is open for about 2 µs. New results are available in ADDAT1 and
ADDAT2 every 48 µs. The previous conversion results are overwritten unless the
contents are transferred to the memory by PEC data transfers or an ordinary interrupt
service routine.
If some of the port lines P5.0 to P5.3 are to be used as digital inputs the associated
enable bits in register P5BEN have to be enabled.
The input voltage on port 5 should never exceed 2.5 V.
A set of SFRs and port pins provide access to control functions and results of the ADC.
Ports & Direction Control
Alternate Functions
P5
AN0/P5.0 ... AN3/P5.3
Data Registers
ADDAT1
ADDAT2
Control Registers
Interrupt Control
ADCON
AD1IC
AD2IC
P5
Port 5 Data Register
ADDAT1 A/D Converter Result Register 1
ADDAT2 A/D Converter Result Register 2
AD1IC A/D Converter Interupt Control Register
(end of conversion)
AD2IC A/D Converter Interrupt Control Register
(end of conversion)
UEA11166
Figure 7-47 SFRs and Port Pins Associated with the A/D Converter
Users Manual
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2000-06-15