SDA6000 Datasheet, PDF (77/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
C16X Microcontroller
Note: Due to the internal instruction pipeline, a new DPP value is not yet usable for the
operand address calculation of the instruction immediately following the updating
of the DPP register by the instruction.
16-Bit Data Address
15 14
0
1023
1022
1021
DPP Registers
3
DPP3-11
14-Bit
2
DPP2-10
Intra-Page Address
(concatenated with
1
DPP1-01
content of DPPx).
0
DPP0-00
Affer reset or with segmentation disabled the DPP registers select data pages 3...0.
All of the internal memory is accessible in these cases.
MCA02264
Figure 4-15 Addressing via the Data Page Pointers
The Context Pointer CP
This non-bit addressable register is used to select the current register context. This
means that the CP register value determines the address of the first General Purpose
Register (GPR) within the current register bank of up to 16 word and/or byte GPRs.
CP
Reset Value: FC00_H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1
1
1
1
cp
0
rrrr
rw
r
Bit
Function
cp
Modifiable Portion of Register CP
Specifies the (word) base address of the current register bank.
When writing a value to register CP with bits CP.11 … CP.9 = ‘000’, bits
CP.11 … CP.10 are set to ‘11’ by hardware, in all other cases all bits of
bit field “cp” receive the written value.
Users Manual
4 - 44
2000-06-15