SDA6000 Datasheet, PDF (157/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
Peripherals
Underflow Output Enable) in register T3CON enables the state of T3OTL to be
monitored via an external line T3OUT. If this line is linked to an external port pin, which
has to be configured as output, T3OTL can be used to control external HW.
In addition, T3OTL can be used in conjunction with the timer over/underflows as an input
for the counter function or as a trigger source for the reload function of the auxiliary
timers T2 and T4. For this purpose, the state of T3OTL does not have to be available at
any port pin, because an internal connection is provided for this option.
Timer 3 in Timer Mode
Timer mode for the core timer T3 is selected by setting bit field T3M in register T3CON
to ‘000_B’.
In this mode, T3 is clocked with the system clock f_{hw_clk} divided by a programmable
prescaler, which is controlled by bit field T3I and BPS1. The input frequency f_T3 for timer
T3 and its resolution r_T3 are scaled linearly with lower module clock frequencies, as can
be seen from the following formula:
f_T3 =
f_{hw_clk}
BPS1 × 2^<T3I>
r_T3 [ms] =
BPS1 × 2^<T3I>
f_{hw_clk} [MHz]
Table 7-2 gives an overview for timer resolutions depending on prescaler factors.
Table 7-2
f_MOD =
33.33 MHz
Timer Input Selection T2I / T3I / T4I
FM =
000_B 000_B 001_B 010_B 011_B
10 0
0
0
100_B
0
101_B
0
110_B 111_B
0
0
Prescaler factor 4 8
16 32 64
128 256 512 1024
Input Frequency 2.08 4.16 2.08 1.04 521.83 260.41 130.20 65.10 32.55
MHz MHz MHz MHz kHz kHz kHz kHz kHz
Resolution
120 240 480 960 1.92 3.84 7.68 15.36 30.72
ns ns ns ns µs
µs
µs
µs µs
Period
7.86 15.72 31.45 62.91 125.82 251.6 503 1
2.01
ms ms ms ms ms ms ms s
s
This formula also applies to the Gated Timer Mode of T3 and to the auxiliary timers T2
and T4 in timer and gated timer mode.
Users Manual
7-6
2000-06-15