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SDA6000 Datasheet, PDF (163/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller
SDA 6000
Peripherals
T3IN
T3EUD
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Jitter Backward
Jitter
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Contents
of T3
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Note: This example shows the timer behavior assuming that T3 counts upon any transition on
input T3IN, i.e. T3I = ’001B’.
UET11138
Figure 7-8 Evaluation of the Incremental Encoder Signals
Note: Timer T3, operating in incremental interface mode, automatically provides
information on the sensor’s current position. Dynamic information (speed,
acceleration, deceleration) may be obtained by measuring the incoming signal
periods.
Auxiliary Timers T2 and T4
Both auxiliary timers T2 and T4 have exactly the same functionality. They can be
configured for timer, gated timer, counter, or incremental interface mode with the same
options for the timer frequencies and the count signal as the core timer T3. In addition to
these 4 counting modes, the auxiliary timers can be concatenated with the core timer, or
they may be used as reload or capture registers in conjunction with the core timer.
The individual configuration for the T2 and T4 timers is determined by their
bit-addressable control registers T2CON and T4CON, which are both organized
identically. Note that functions which are present in all 3 timers of timer block 1 are
controlled in the same bit positions and in the same manner in each of the specific
control registers.
Run control for auxiliary timers T2 and T4 can be handled by the associated Run Control
Bit T2R, T4R in register T2CON/T4CON. Alternatively, a remote control option (T2RC,
T4RC set) may be enabled to start and stop T2/T4 via the run bit T3R of core timer T3.
Users Manual
7 - 12
2000-06-15