SDA6000 Datasheet, PDF (367/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
Register Overview
Table 13-1 (cont’d)
Name
Description
Physical 8-Bit Reset
Address Address Value
XADRS4 External Address Select Register 4
F01A_H 0D_H
XADRS5 External Address Select Register 5
F01C_H 0E_H
XADRS6 External Address Select Register 6
F01E_H 0F_H
XBCON1 XBUS Control Register 1
F114_H 8A_H
XBCON2 XBUS Control Register 2
F116_H 8B_H
XBCON3 XBUS Control Register 3
F118_H 8C_H
XBCON4 XBUS Control Register 4
F11A_H 8D_H
XBCON5 XBUS Control Register 5
F11C_H 8E_H
XBCON6 XBUS Control Register 6
F11E_H 8F_H
DPP0
CPU Data Page Pointer 0 (10bits)
FE00_H 00_H
DPP1
CPU Data Page Pointer 1 (10bits)
FE02_H 01_H
DPP2
CPU Data Page Pointer 2 (10bits)
FE04_H 02_H
DPP3
CPU Data Page Pointer 3 (10bits)
FE06_H 03_H
MDH
CPU Multiply Divide Control Register High FE0C_H 06_H
Word
0000_H
0000_H
0000_H
0000_H
0000_H
0000_H
0000_H
0000_H
0000_H
0000_H
0001_H
0002_H
0003_H
0000_H
MDL
CPU Multiply Divide Control Register Low FE0E_H 07_H
Word
0000_H
MDC
CPU Multiply Divide Control Register
PSW
CPU Program Status Word
STKUN
CPU Stack Underflow Pointer Register
STKOV
CPU Stack Overflow Pointer Register
SP
CPU System Stack Pointer
CP
CPU Context Pointer
CSP
CPU Code Segment Control Register
SCUSLC Security Level Command Register
SCUSLS Security Level Status Register
ZEROS Constant Value 0’s Register (read only)
ONES
Constant Value 1’s Register (read only)
XPERCON X-Peripheral Control Register
EXISEL Alternative External Interrupt Selection
FF0E_H
FF10_H
FE16_H
FE14_H
FE12_H
FE10_H
FE08_H
F0C0_H
F0C2_H
FF1C_H
FF1E_H
F024_H
F1DA_H
87_H
88_H
0B_H
0A_H
09_H
08_H
04_H
60_H
61_H
8E_H
8F_H
12_H
ED_H
0000_H
0000_H
0000_H
0000_H
FC00_H
FC00_H
0000_H
0000_H
0000_H
0000_H
FFFF_H
0000_H
0000_H
Users Manual
13 - 12
2000-06-15