SDA6000 Datasheet, PDF (343/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
12.5.1 RAM Registers
Slicer and Acquisition
Field Parameters
All field parameters are updated once in a field. This means that the status information
written from the acquisition interface to the memory at that time only represents a
snapshot of the status. Hardware ensures that field parameters are updated even if only
one of the two CVBS signals has a valid sync timing. So it is assured that even if CVBS1
is not available data of CVBS2 still can be sliced.
ACQFP0
Reset Value: XXXX_H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FC3(15..0)
Bit
FC3
(15 … 0)
ACQFP1
Function
Framing code 3
Bit 15: First received bit of FC.
Bit 0: Last received bit of FC.
Reset Value: XXXX_H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FC3MASK(15..0)
Bit
FC3MASK
(15 … 0)
Function
Mask for Framing code 3
Bit 15: Mask for first received bit of FC.
Bit 0: Mask for last received bit of FC.
Users Manual
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2000-06-15