SDA6000 Datasheet, PDF (200/380 Pages) Infineon Technologies AG – Teletext Decoder with Embedded 16-bit Controller

SDA 6000
Peripherals
Data reception is enabled by the receiver enable bit S0REN. After reception of a
character has been completed, the received data and, if provided by the selected
operating mode, the received parity bit can be read from the (read-only) receive buffer
register S0RBUF. Bits in the upper half of S0RBUF which are not valid in the selected
operating mode will be read as zeros.
Data reception is double-buffered, so that reception of a second character may begin
before the previously received character has been read out of the receive buffer register.
In all modes, receive buffer overrun error detection can be selected through bit S0OEN.
When enabled, the overrun error status flag S0OE and the error interrupt request line
S0EIR will be activated if the receive buffer register has not been read when the
reception of a second character is complete. The previously received character in the
receive buffer is overwritten.
The Loop-Back option (selected by bit S0LB) allows the data currently being transmitted
to be received simultaneously in the receive buffer. This may be used to test serial
communication routines at an early stage without having to provide an external network.
In loop-back mode the alternate input/output functions of the Port 3 pins are not
necessary.
Note: Serial data transmission or reception is only possible when the baud rate
generator run bit S0R is set to ‘1’. Otherwise the serial interface is idle.
Do not program the mode control field S0M in register S0CON to one of the
reserved combinations to avoid unpredictable behavior of the serial interface.
7.3.1 Asynchronous Operation
Asynchronous mode supports full-duplex communication, where both transmitter and
receiver use the same data frame format and the same baud rate. Data is transmitted
on pin TXD0 and received on pin RXD0. These signals are alternate functions of Port 3
pins. IrDA data transmission/reception supports up to 115.2 KBit/s. Figure 7-24 shows
the block diagram of the ASC0 operating in asynchronous mode.
Users Manual
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2000-06-15