C8051F124-GQR Datasheet, PDF (95/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
SFR Definition 7.1. AMX2CF: AMUX2 Configuration
SFR Page: 2
SFR Address: 0xBA
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
-
-
-
-
PIN67IC PIN45IC PIN23IC PIN01IC 00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bits7–4:
Bit3:
Bit2:
Bit1:
Bit0:
UNUSED. Read = 0000b; Write = don’t care.
PIN67IC: AIN2.6, AIN2.7 Input Pair Configuration Bit.
0: AIN2.6 and AIN2.7 are independent single-ended inputs.
1: AIN2.6 and AIN2.7 are (respectively) +, – differential input pair.
PIN45IC: AIN2.4, AIN2.5 Input Pair Configuration Bit.
0: AIN2.4 and AIN2.5 are independent single-ended inputs.
1: AIN2.4 and AIN2.5 are (respectively) +, – differential input pair.
PIN23IC: AIN2.2, AIN2.3 Input Pair Configuration Bit.
0: AIN2.2 and AIN2.3 are independent single-ended inputs.
1: AIN2.2 and AIN2.3 are (respectively) +, – differential input pair.
PIN01IC: AIN2.0, AIN2.1 Input Pair Configuration Bit.
0: AIN2.0 and AIN2.1 are independent single-ended inputs.
1: AIN2.0 and AIN2.1 are (respectively) +, – differential input pair.
Note: The ADC2 Data Word is in 2’s complement format for channels configured as differential.
Rev. 1.4
95