C8051F124-GQR Datasheet, PDF (214/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
Cache Push
Operations
Decrement
CHSLOT
CHSLOT = 58
Cache Pop
Operations
Increment
CHSLOT
TAG 0
TAG 1
TAG 2
SLOT 0
SLOT 1
SLOT 2
TAG 57
TAG 58
TAG 59
TAG 60
TAG 61
TAG 62
SLOT 57
SLOT 58
SLOT 59
SLOT 60
SLOT 61
SLOT 62
Figure 16.3. Cache Lock Operation
Lock Status
UNLOCKED
UNLOCKED
UNLOCKED
UNLOCKED
UNLOCKED
UNLOCKED
LOCKED
LOCKED
LOCKED
LOCKED
214
Rev. 1.4