C8051F124-GQR Datasheet, PDF (324/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
SFR Definition 23.13. TMRnH Timer 2, 3, and 4 High Byte
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address: TMR2H: 0xCD; TMR3H: 0xCD; TMR4H: 0xCD
SFR Page: TMR2H: page 0; TMR3H: page 1; TMR4H: page 2
Bits 7–0: TH2, 3, and 4: Timer 2, 3, and 4 High Byte.
The TH2, 3, and 4 register contains the high byte of the 16-bit Timer 2, 3, and 4
324
Rev. 1.4