C8051F124-GQR Datasheet, PDF (87/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
Input Voltage
(AD0.0 - AD0.1)
REF x (511/512)
ADC Data
Word
0x01FF
ADWINT
not affected
REF x (256/512)
REF x (-1/512)
0x0101
0x0100
0x00FF
0x0000
0xFFFF
0xFFFE
ADC0LTH:ADC0LTL
ADWINT=1
ADC0GTH:ADC0GTL
ADWINT
not affected
-REF
0xFE00
Given:
AMX0SL = 0x00, AMX0CF = 0x01,
AD0LJST = ‘0’,
ADC0LTH:ADC0LTL = 0x0100,
ADC0GTH:ADC0GTL = 0xFFFF.
An ADC0 End of Conversion will cause an
ADC0 Window Compare Interrupt (AD0WINT
= ‘1’) if the resulting ADC0 Data Word is
< 0x0100 and > 0xFFFF. (In 2s-complement
math, 0xFFFF = -1.)
Input Voltage
(AD0.0 - AD0.1)
REF x (511/512)
ADC Data
Word
0x01FF
ADWINT=1
REF x (256/512)
REF x (-1/512)
0x0101
0x0100
0x00FF
0x0000
0xFFFF
0xFFFE
ADC0GTH:ADC0GTL
ADWINT
not affected
ADC0LTH:ADC0LTL
ADWINT=1
-REF
0xFE00
Given:
AMX0SL = 0x00, AMX0CF = 0x01,
AD0LJST = ‘0’,
ADC0LTH:ADC0LTL = 0xFFFF,
ADC0GTH:ADC0GTL = 0x0100.
An ADC0 End of Conversion will cause an
ADC0 Window Compare Interrupt (AD0WINT
= ‘1’) if the resulting ADC0 Data Word is
< 0xFFFF or > 0x0100. (In 2s-complement
math, 0xFFFF = -1.)
Figure 6.7. 10-Bit ADC0 Window Interrupt Example: Right Justified Differential
Data
Rev. 1.4
87