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C8051F124-GQR Datasheet, PDF (337/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family
C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
SFR Definition 24.3. PCA0CPMn: PCA0 Capture/Compare Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
PWM16n ECOMn CAPPn CAPNn MATn TOGn PWMn ECCFn 00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR PCA0CPM0: 0xDA, PCA0CPM1: 0xDB, PCA0CPM2: 0xDC, PCA0CPM3: 0xDD, PCA0CPM4: 0xDE,
Address: PCA0CPM5: 0xDF
SFR
Page:
PCA0CPM0:
PCA0CPM5:
page
page
0,
0
PCA0CPM1:
page
0,
PCA0CPM2:
page
0,
PCA0CPM3:
0,
PCA0CPM4:
page
0,
Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
PWM16n: 16-bit Pulse Width Modulation Enable
This bit selects 16-bit mode when Pulse Width Modulation mode is enabled (PWMn = 1).
0: 8-bit PWM selected.
1: 16-bit PWM selected.
ECOMn: Comparator Function Enable.
This bit enables/disables the comparator function for PCA0 module n.
0: Disabled.
1: Enabled.
CAPPn: Capture Positive Function Enable.
This bit enables/disables the positive edge capture for PCA0 module n.
0: Disabled.
1: Enabled.
CAPNn: Capture Negative Function Enable.
This bit enables/disables the negative edge capture for PCA0 module n.
0: Disabled.
1: Enabled.
MATn: Match Function Enable.
This bit enables/disables the match function for PCA0 module n. When enabled, matches of
the PCA0 counter with a module's capture/compare register cause the CCFn bit in PCA0MD
register to be set to logic 1.
0: Disabled.
1: Enabled.
TOGn: Toggle Function Enable.
This bit enables/disables the toggle function for PCA0 module n. When enabled, matches of
the PCA0 counter with a module's capture/compare register cause the logic level on the
CEXn pin to toggle. If the PWMn bit is also set to logic 1, the module operates in Frequency
Output Mode.
0: Disabled.
1: Enabled.
PWMn: Pulse Width Modulation Mode Enable.
This bit enables/disables the PWM function for PCA0 module n. When enabled, a pulse
width modulated signal is output on the CEXn pin. 8-bit PWM is used if PWM16n is logic 0;
16-bit mode is used if PWM16n logic 1. If the TOGn bit is also set, the module operates in
Frequency Output Mode.
0: Disabled.
1: Enabled.
ECCFn: Capture/Compare Flag Interrupt Enable.
This bit sets the masking of the Capture/Compare Flag (CCFn) interrupt.
0: Disable CCFn interrupts.
1: Enable a Capture/Compare Flag interrupt request when CCFn is set.
Rev. 1.4
337