C8051F124-GQR Datasheet, PDF (42/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
Name
VREF
VREFA
VREF0
VREF2
VREFD
AIN0.0
AIN0.1
AIN0.2
AIN0.3
AIN0.4
AIN0.5
AIN0.6
AIN0.7
CP0+
CP0-
CP1+
CP1–
DAC0
Table 4.1. Pin Definitions (Continued)
Pin Numbers
‘F120
‘F122
‘F124
‘F126
‘F121
‘F123
‘F125
‘F127
‘F130
‘F132
‘F131
‘F133
Type
Description
12
7
12
7 A I/O Bandgap Voltage Reference Output
(all devices).
DAC Voltage Reference Input
(C8051F121/3/5/7 only).
8
A In ADC0 and ADC2 Voltage Reference Input.
16
16 8 A In ADC0 Voltage Reference Input.
17
17
A In ADC2 Voltage Reference Input.
15
15
A In DAC Voltage Reference Input.
18
9
18
9 A In ADC0 Input Channel 0 (See ADC0 Specification
for complete description).
19 10 19 10 A In ADC0 Input Channel 1 (See ADC0 Specification
for complete description).
20 11 20 11 A In ADC0 Input Channel 2 (See ADC0 Specification
for complete description).
21 12 21 12 A In ADC0 Input Channel 3 (See ADC0 Specification
for complete description).
22 13 22 13 A In ADC0 Input Channel 4 (See ADC0 Specification
for complete description).
23 14 23 14 A In ADC0 Input Channel 5 (See ADC0 Specification
for complete description).
24 15 24 15 A In ADC0 Input Channel 6 (See ADC0 Specification
for complete description).
25 16 25 16 A In ADC0 Input Channel 7 (See ADC0 Specification
for complete description).
9
4
9
4 A In Comparator 0 Non-Inverting Input.
8
3
8
3 A In Comparator 0 Inverting Input.
7
2
7
2 A In Comparator 1 Non-Inverting Input.
6
1
6
1 A In Comparator 1 Inverting Input.
100 64
A Out Digital to Analog Converter 0 Voltage Output.
(See DAC Specification for complete descrip-
tion).
42
Rev. 1.4