C8051F124-GQR Datasheet, PDF (93/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
A. ADC Timing for External Trigger Source
CNVSTR2
(AD2CM[2:0]=010)
SAR Clocks
123456789
AD2TM=1
Low Power
or Convert
Track
Convert
Low Power Mode
AD2TM=0
Track or Convert
Convert
Track
B. ADC Timing for Internal Trigger Source
Write '1' to AD2BUSY,
Timer 3 Overflow,
Timer 2 Overflow,
Write '1' to AD0BUSY
(AD2CM[2:0]=000, 001, 011, 1xx)
1 2 3 4 5 6 7 8 9 10 11 12
SAR Clocks
Low Power
AD2TM=1 _{or Convert}
Track
Convert
Low Power Mode
SAR Clocks
123456789
AD2TM=0
Track or
Convert
Convert
Track
Figure 7.2. ADC2 Track and Conversion Example Timing
Rev. 1.4
93